Physical IC Design Consulting

When it’s time to prove your breakthrough technology in silicon, you’re in for an adventure because standard design tools have never seen a chip like yours. Your goal is to tape out your new chip quickly, and fit your customers’ existing design flows. Only then do you get revenue.

This means you must leverage all the functionality offered by existing design software and flows, avoiding unreliable tricks that cause technical hurdles and sales objections.

When standard design tools cannot do the job, you must develop software to fill the gaps. Well designed software enhances your value proposition by implementing your solution while protecting proprietary know how.

Tape out your breakthrough chip with John McGehee on your design and development team. John specializes in tapeouts of new and unusual chips, with experience in every facet of physical design: chip tapeout, flow design, and C++ application development.

Key Benefits

  • Proven tapeout success with the most unusual designs to 65nm
  • Accelerate tapeout, ease adoption and maintenance by using existing tools and flows to the greatest extent possible
  • Develop software of appropriate complexity, from simple tool scripts to C++ EDA applications
  • Work performed at your site assures confidentiality and close cooperation with your team

EDA Tools

Voom has extensive tapeout experience in multi-vendor flows with a wide variety of EDA tools:

Synopsys

  • Design Compiler logic synthesis
  • Physical Compiler physical synthesis
  • Jupiter floorplanner
  • Astro automatic place and route
  • AstroRail and Astro XTalk analysis
  • STAR-RCXT RC parasitic extraction
  • Formality formal verification
  • PrimeTime and PrimeTime-SI timing analysis
  • Hercules LVS/DRC physical verification
  • Formality formal verification
  • PrimeTime and PrimeTime-SI timing analysis
  • Hercules LVS/DRC physical verification

Cadence

  • Virtuoso custom layout and schematics
  • RTL Compiler logic synthesis
  • First Encounter virtual prototyping
  • SoC Encounter place and route
  • Fire & Ice QX RC parasitic extraction
  • VoltageStorm power analysis
  • Conformal-LC formal verification
  • CeltIC crosstalk analysis
  • Assura LVS/DRC physical verification

Mentor

  • Calibre LVS/DRC physical verification

Get to tapeout. Get Voom.

UA-1131005-1