John McGehee Resume

1691 Whitham Avenue
Los Altos, CA 94024 USA
(408) 314-1624

As with most professionals, the most detailed, up-to-date information about me is available on my LinkedIn public profile at www.linkedin.com/in/jmcgehee.  Read about how I make stuff happen™ in my blog at www.voom.net.

EDUCATION

  • Master of Science, Electrical and Computer Engineering, 1988
  • Bachelor of Science, Electrical and Computer Engineering, 1983

Both at University of California, Santa Barbara

LANGUAGES

  • English Native Speaker
  • Proper Technical and Commercial Japanese
  • Atrocious Spanish and Mandarin Chinese
  • C++, C#, Python, Tcl, Perl, Skill, Milkyway, OpenAccess, XML, XSL, Linux

EXPERIENCE

Voom, Inc.

President
1997 – Present
Los Altos, California

Software development and software development methodology.  ASIC physical design. Chip tapeout to 65nm. Chip design methodology and EDA software development to 20nm.  Multi-vendor flow development based on industry-standard tools from Synopsys, Cadence and Mentor. Developed and marketed the Mower Milkyway-OpenAccess translator application. Created and licensed the Voom Flow ASIC design flow for automated physical design. Created the TSMC Reference Flow 4.0 for Cadence.  See my LinkedIn profile for project details.

Avant! Corporation (now Synopsys)

Principal Software Engineer
1992 – 1997
Sunnyvale, California

Expert technical support, training, product demonstrations and benchmarks for the successful introduction and market penetration of hit place and route tools Astro and Jupiter. Authored eleven authoritative technical manuals.
Programmed in C and Scheme.

Cadence Design Systems

Application Engineer
1988 – 1992
Yokohama, Japan

Technical and marketing support and benchmarking for successful launch of Cadence Cell3 and Gate Ensemble place and route software. Increased annual sales in Japan from $3.5 million to $9 million. Managed and trained Japanese engineers. Wrote training manual in Japanese and lectured in Japanese. Programmed in C and Cadence Skill.

Daisy Systems Japan

Application Engineer
1985 – 1987
Tokyo, Japan

Technical support of customers and distributors at Japanese subsidiary of design automation firm. Performed benchmarks, demonstrations and technical presentations. Acted as technical liaison between Japanese distributors, customers and corporate headquarters.

Intel Japan

VLSI Design Engineer
1984 – 1985
Tsukuba, Japan

As an American Electronics Association Japan Research Fellow, performed circuit simulation, logic verification and layout for a CMOS microprocessor.  Read more about this experience at www.voom.net/how-i-got-to-japan.

Delco System Operations

VLSI Design Engineer
1983 – 1984
Santa Barbara, California

Performed CMOS design, analysis and layout for a high performance avionics microprocessor chip set.

PERSONAL

Married, one child. United States citizen with unrestricted work privileges in Japan. Leisure interests include snowboarding, edible landscaping, mid-century modern design, and that big band sound.